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  NJ-Long Branch, RTL Designer, HDL Design, ASIC, FPGA, Verilog, Unix Scripting, C, High Speed Digital Circuit Design As an engineering team member, you will contribute to the design, development and verification of our hardware protocol acceleration solutions for data networking and enterprise storage applications. Responsibilities: * Lead the block level architecture design. * Author detailed design documents. *
RTL Design Engineer, RTL Designer, CPU Design Engineer